January 31, 2009

Accelicon's Advanced Measurement and Modeling Services
Accelicon assembles advanced lab for IV/CV/Noise/RF measurement & modeling

Accelicon Technologies, Inc. (Accelicon), the leading device-modeling solutions provider, has recently completed assembling an advanced lab for measurement and modeling services.  Services include IV, CV, Noise, and RF measurement as well as device-level model generation services for BSIM, HiSIM and PSP for bulk, SOI, HV, RF, Noise and Reliability. Accelicon has particular expertise with device level models for advance process geometries and extensive experience providing professional services in this area.

The lab, based in Accelicon's Beijing engineering office, consists of the most advanced equipment for measurement and modeling, including probe station with thermal control unit and isolation table, IV and CV meters, switched matrix, low noise amplifier, Spectrum Analyzer and Network Analyzer.

According to Tim K Smith, Accelicon's CEO, "Our investment in an advanced lab for measurement and device-level modeling is consistent with Accelicon's mission to provide the finest solutions, services and support to our customers."

January 25, 2009
Accelicon at 46th DAC
Accelicon to exhibit at the Design Automation Conference

Accelicon Technologies, Inc. (Accelicon), the leading device-modeling solutions provider, announces its intention to exhibit at the 46th Design Automation Conference.   The Design Automation Conference (DAC) is the premier event for the design of electronic circuits and systems, and for EDA and silicon solutions. DAC features a wide array of technical presentations plus over 250 of the leading electronics design suppliers.  This year, DAC will be held at the Moscone Center in San Francisco, California from July 26 through July 31. 

January 20, 2009

Accelicon's MQA Selected by STARC for HiSIM2 Device-Level Model Validation
STARC and Accelicon collaborate to provide qualification platform based on MQA

Accelicon Technologies, Inc. (Accelicon), the leading device-modeling solutions provider, has been chosen by the Semiconductor Technology Academic Research Center (STARC) to provide the platform to qualify HiSIM2 model.  STARC is a research consortium co-founded by major Japanese semiconductor companies in December 1995.  STARC and Accelicon are collaborating to establish standard Quality Assurance procedures for HiSIM2 model qualification, version control, model-card comparison and document generation support, based on MQA.

STARC engaged in a stringent evaluation process in order to select the optimum solution for HiSIM2 Quality Assurance and model documentation. MQA, being the semiconductor industry standard for device-level model qualification, comparison and documentation, was the natural choice based on its features, maturity and extensibility.

Recently the HiSIM_HV model has been selected by the Compact Model Council (CMC) as a standard for high-voltage transistor compact model. The CMC was formed in August, 1996, for the purpose of promoting standardization in the use and implementation of Compact models.

"After carefully evaluation, STARC decided to adopt industry widely used and leading tool MQA as HiSIM2 QA platform. STARC will work with Accelicon to build standard QA procedures for HiSIM2 model qualification, version control, model card comparison and documentation generation." said Yoshiharu Furui, Senior Manager of STARC Design Standard Group.

"It is an honor for Accelicon to be selected to collaborate with STARC on this project" said Tim K Smith, Accelicon's CEO. "The HiSIM2 and HiSIM_HV model have been selected by CMC as standard models, and MQA will provide the ideal platform to validate and document this model in a comprehensive and efficient manner."

About STARC

Semiconductor Technology Academic Research Center (STARC) was established in December 1995 with investment from Japan's leading semiconductor suppliers to reinforce semiconductor design capability. Since its inception, STARC has been conducting joint research with universities and the semiconductor industry to strengthen the bases of research in the field of semiconductor technology at domestic universities. The outcomes of these activities have now been utilized industry-wide in Japan through the transfer of technologies to investing companies to help their businesses, the documenting of technical standards and the licensing of technologies to partner companies for commercialization. For more information about STARC and its research, visit www.starc.jp/index-e.html.

January 10, 2009

Accelicon Technologies Acquires Knowlent IP
Accelicon completes acquisition of Knowlent Analog Test-Bench Generation IP

Accelicon Technologies, Inc. (Accelicon), the leading device-modeling solutions provider, has recently completed the acquisition of all of Knowlent's technology rights, including products, source code, and other IP. Knowlent was the industry's leading analog/mixed-signal test bench development environment, including analysis, characterization and verification functionality. Knowlent's existing Opal customers will continue to be supported by Accelicon.

"Knowlent has developed an outstanding portfolio of technologies to address the needs of the analog and mixed-signal engineer." said Tim K Smith, Accelicon's CEO. "Knowlent's Opal was the industry's technology leader for analog test bench generation and verification."

January 5, 2009
Accelicon's 2008 Year End Review
Accelicon reports significant revenue growth in 2008

Accelicon Technologies, Inc. (Accelicon), the leading device-modeling solutions provider, reports significant revenue and customer growth in 2008. In an otherwise challenging year in the semiconductor and EDA market, Accelicon continued to observe increased adoption of their device modeling solutions and associated services. MBP, Model Builder Program, became the leading device model extraction and generation solution for semiconductor companies worldwide in 2008. MBP's performance, ease-of-use, accuracy, and advanced model support, are unequalled in the industry. Accelicon's MQA, Model Quality Assurance, continues to be the standard for model verification and documentation throughout the industry. Accelicon's customer list expanded to over 80 worldwide, including foundries, IDMs and fab-less design houses. Profitable, and incorporated since 2002, Accelicon claims the largest engineering staff dedicated to device modeling solutions worldwide.

Accelicon announced PQA, Proximity Quality Assurance, in 2008. Developed with the collaboration of leading semiconductor design houses, PQA is the industry's first platform for sub 45nm SPICE model and design analysis. PQA allows engineers to evaluate the advanced models provided by leading foundries, which incorporate the effects of stress and lithography distortions, and its effect on design performance.

Also in 2008, Accelicon continued to develop and enhance their advance measurement and modeling lab. A new wafer probe station was installed, and advanced 1/f noise and reliability measurement and modeling capabilities were incorporated. Accelicon offers modeling services to their customers, and is the largest such provider in the field.

Accelicon became a member of the Compact Model Council in 2008. The Compact Model Council is the premier organization establishing standards in the device-level modeling community. The CMC's charter is to promote the international, nonexclusive standardization of compact model formulations and the model interfaces.

And, Accelicon completed the IP acquisition of Knowlent last year. Knowlent was the industry's leading analog/mixed-signal test bench development environment, including analysis, characterization and verification functionality. Knowlent's existing Opal customers will continue to be supported by Accelicon.

"On behalf of our entire organization, I would like to express our sincere appreciation to Accelicon's customers who have adopted our solutions, and worked with us to improve them ." said Tim K Smith, Accelicon's CEO. "Accelicon's success is testament to our dedication supporting customers and developing the finest solutions in this space."

October 21, 2008
Accelicon Technologies Sponsors San Francisco MOS AK Modeling Workshop.

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-  Accelicon Technologies Sponsors San Francisco MOS AK Modeling Workshop -Accelicon Technologies is proud to be the lead sponsor of the MOS AK compact modeling workshop to be conducted in San Francisco on December 13th, 2008 at the Westin St. Francis on Union Square. MOS AK is the premier international modeling and parameter extraction working group lead by well known modeling expert Dr. Wladek Grabinski and is open to device modeling professionals in industry and academia. Please consult www.mos-ak.org for agenda and registration information.

October 21, 2008
Accelicon Technologies Joins Compact Modeling Council (CMC)

- Accelicon Technologies Joins Compact Modeling Council (CMC) – Accelicon, the world technology leader in device-level SPICE generation and validation solutions, has been accepted as a member of the Compact Modeling Council (CMC). The CMC’s charter is to promote the international, nonexclusive standardization of compact model formulations and the model interfaces. As such, Accelicon will be an active member promoting and supporting advanced compact model standards approved by CMC.


Aug 7, 2008
Accelicon announced the most comprehensive High Voltage Device Modeling Package with the HISIM_HV model support

Including Industry’s first Automatic Extraction Flow for HiSIM_HV and tested by several leading foundries, and IDM.
Model Parameter guide and Equation Viewer enable user to obtain high quality HiSIM_HV models without intensive study of the model principles.
Besides HiSIM_HV, MBP offers automatic model extraction for HSPICE Level 66, and the flow has been successfully exercised in production with over 20 high voltage process data from leading foundries.
MBP also offers industry’s best and fastest sub-circuit modeling approach for high voltage device modeling
       Flexible and proven by many world class customers.
With HiSIM_HV, Level66 and HV marco model support, MBP provides industry’s most comprehensive High Voltage Device Modeling Package.

Apr 30, 2008
Accelicon Technologies, Inc. to Exhibit at 45th DAC in Anaheim California.

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Accelicon Technologies, Inc. will exhibit at the 45th Design Automation Conference (www.dac.com) June 8th-12th in Anaheim California. Accelicon will be demonstrating the latest versions of their leading device-level model validation solution-MQA, their flagship device-modeling product-MBP and introduce the market's first PDK validation solution –PQA. Device-modeling and validation demonstrations will focus on the industry's widely used BSIM model and new PSP, HiSIM, and HiSIM HV model. Accelicon will be at booth #2859 at DAC. Please contact Tim K. Smith at tsmith@accelicon.com, or your local sales representative (http://www.accelicon.com/contact/index.shtml), to schedule a suite demonstration.

Accelicon Technologies, Inc. based in Cupertino California, is a technology leader in device-level modeling and validation, as well as PDK-level validation. Profitable, in its sixth year, and with over 60 customers worldwide, Accelicon has established itself as a market leader as well. Accelicon's products are: MBP for device-level extraction and model generation, MQA for device-level model validation, and PQA for PDK validation. MBP is the next-generation device-level model extraction and generation solution, incorporating superior optimization and simulation for ‘order of magnitude' performance improvement. Innovative patented features, such as task tree ordering and equation viewer, enable unparalleled ease of use. MQA is a rules-driven device-level model validation solution used by foundries for model QA and semiconductor design houses for model qualification. MQA is also used for model and simulator comparison as well as a documentation standard. PQA automates the SPICE analysis of DFM parasitics on the layout. Second-order layout-dependent effects, characteristic in finer geometry processes, are significantly complicating PDK validation, thus requiring automated validation techniques.

May 15 2008
Accelicon announced the release of DFM-aware and Layout-aware Model verification platform – PQA.

With DFM (Design For Manufacture) considerations, Process Design Kit (PDK) has become more and more complicated, more procedures and tools are involved and efforts of verification are tremendous without automation. Accelicon has developed an automated yet flexible solution for DFM-aware PDK verification by (1) integration of EDA tools needed for PDK verification. (2) A rule driven feature that ensures the flexibility. (3) open interfaces ready to be adjusted to suit for any design flow or future challenges.


May 15 2008
Accelicon announced the release of MBP 2008.1.0 and MQA 2008.1.0

MBP 2008.1.0 provides the solutions for the latest modeling challenges including PSP, HiSIM2 and HiSIM_HV. Automatic extraction flows for all the models are provided and this version is also equipped with features that enable user to extract PSP, HiSIM or HiSIM_HV models without studying the model principles. The PSP Solution is also the industry's first to support "local-global", "local-bin" and Accelicon's unique "Global" approaches.


April, 15 2008
Advanced Modeling Seminar, Hsinchu, Taiwan.

Our modeling specialists and well known device modeling and DFM experts from STARC will introduce you to a range of latest modeling techniques, solutions and EDA tools and we also invite well known industry experts to address the latest modeling challenges and the related solutions.

Complete solution covering the latest modeling challenges

>> HiSIM, PSP, HiSIM_HV and SOI model extractions.

>> HSIM and HSIM_HV Insight.

>> Model QA standard platform.

DFM-Aware PDK QA challenges and solution

>> Answering DFM challenges in PDK verification.

>> PQA – Automatic PDK verification solution.

Accelicon's latest Modeling Suite

>> MQA – Complete SPICE Model Validation Solution.

>> MBP – PSP, HiSIM, HV and SOI extraction.

>> PQA – Industry's first DFM-Aware PDK verification Platform.


March 17, 2008
Accelicon Technologies Joins Synopsy' HSPICE Integrator Program.

Accelicon is a member of Synopsys' newly announced HSPICE Integrator Program designed to provide EDA vendors with the necessary tools and support to enable integration with the HSPICE simulation suite.

Accelicon's industry-leading device-level model generation and validation solutions, MBP and MQA respectively, are tightly integrated with HSPICE, with over 50 customers worldwide using this integrated solution.

Feburary 28, 2008
Accelicon Technologies, Inc. Announces Another Year of Revenue Growth in 2007.

Accelicon Technologies, Inc, a California based Electronic Design Automation company, is pleased to report another year of robust revenue growth. Accelicon, the technology leader in device-modeling and validation, grew revenues substantially in 2007, compared to 2006, and claims over 60 leading semiconductor companies as customers worldwide. "In particular," says CEO Tim K Smith, "Accelicon saw significant adoption of MBP, the next-generation solution for device modeling, by foundries and fabless design houses worldwide. Modeling challenges presented by the finer process geometries demand a solution which is efficient, accurate and easy to adopt. MBP, meets this challenge, as evidenced by its rapid acceptance in the market."

Accelicon also successfully completed the sale of AVP, Analog Virtual Prototyping automated placer, to Magma Design Automation in 2007.<

Accelicon Technologies, Inc. provides best-in-class solutions for device-level model extraction and generation and model validation. MBP, Model Builder Program, is the technology leader for process extraction and device model generation. MQA, Model Quality Assurance, is the standard for device level model validation, comparison and documentation.

January 15 ,2008
Accelicon Technologies Model Quality Assurance MQA fully implements STARC Model QA specifications.

Accelicon Technologies Inc. of Cupertino, California "Accelicon" and Japan Distributor announced implementation of the device-level model parameter QA specifications developed by Semiconductor Technology Academic Research Center Co., Ltd. of Yokohama, Japan "STARC"  into  Accelicon's MQA rules file.

Advanced process nodes, due to their reduced feature sizes and second order effects, create a special challenge to device level model development. Adequately incorporating these effects into the device-level model is of growing importance to the provider and user of foundry models. Furthermore, automation has become a requirement to assure the accuracy and quality of released device-level models.

STARC's device level model QA specifications were developed by STARC, to address advanced process node model characteristics including device physics validation, precision error calculation and convergence characteristics. In addition, STARC has provided a comprehensive quality specification, detailed model description and a quality use model. STARC expects to expand the model QA specification not only in STARC clients but also in worldwide company.

MQA (Model Quality Assurance) is the semiconductor industry's proven device-level model validation solution with over 50 customers worldwide. Accelicon's MQA is a model inspection solution providing automated model validation, comparison and reporting. It's rules-driven knowledge-based methodology can be easily customized for customer specific validation and reporting functions. MQA is currently used at foundries, fab-less semiconductor companies and IDMs. Accelicon's modeling products for the semiconductor industry are represented in Japan by AT design Links Corporation.

Accelicon announce the implementation of STARC's model parameter and compact model QA specifications into MQA's rules files. MQA, therefore, is able to automatically validate models using STARC's comprehensive model specifications. In addition, MQA's efficient data management enables effective analysis of the results using graphs and reports. Dr. Steven Zhang, President and Founder of Accelicon Technologies, Inc, stated that STARC's robust model QA specifications are available in MQA for use within STARC and for MQA's customers worldwide.

About STARC

STARC is a research consortium co-founded by major Japanese semiconductor companies in December 1995. STARC's mission is to contribute the growth of the Japanese semiconductor industry by developing leading-edge SoC design technologies

Receiving the commission from shareholding companies (clients), STARC takes a lead role in cooperative activities with industrial and academic bodies, as well as public research facilities, with the aim of developing continually innovative semiconductor technologies. We also conduct joint research and development with domestic and international partner companies (including EDA vendors and design houses). The outcomes of our research and development are transferred to these partner companies in the form of production licenses so that these technologies can be widely utilized.

http://www.starc.jp/ (Japanese)

http://www.starc.jp/index-e.html(English)

Jul 6 ,2007
Accelicon 5th Anniversary

This month Accelicon Technologies, Inc. will be 5 years old. We remain steadfast in our vision of being the premier provider of device-level modeling and validation solutions to our customers. With over 50 customers in the foundry, IDM and fab-less semiconductor markets, distributed throughout the world, Accelicon is well on this path. This couldn't be accomplished without our customer's support of and faith in Accelicon, and our employee's hard work and dedication.

Please allow me to take this moment to sincerely thank Accelicon's valued customers and capable employees. We are singularly motivated to provide an ever-improving experience for our customers, employees and shareholders.

Tim K Smith - CEO – Accelicon Technologies, Inc.

May 8, 2007
Accelicon Technologies, Inc. to Exhibit at 44th DAC in San Diego

Accelicon Technologies, Inc., of Cupertino CA, plans to exhibit at the 44th Design Automation Conference (www.dac.com) June 4-7th in San Diego. Accelicon will be demonstrating the latest versions of their leading device-level model validation solution MQA, and MBP, their flagship device-modeling product. Accelicon will be at booth #661 at DAC. Please contact Tim K. Smith at tsmith@accelicon.com, or your local sales representative (http://www.accelicon.com/contact/index.shtml), to schedule a suite demonstration.

Accelicon Technologies, Inc., is dedicated to providing the most advanced device-level modeling solutions, and related services, to the semiconductor market. MBP, Model Builder Program, is an efficient and accurate device characterization, parameter extraction and SPICE modeling solution. MQA, Model Quality Assurance, is the industry's leading SPICE model validation solution design to verify model quality and automate QA and reporting procedures. Accelicon serves over 50 customers worldwide, and partners with the major EDA firms.

January 31, 2007
Accelicon Technologies reports significant growth in sales and new customers in 2006

Cupertino, CA – Accelicon Technologies reports significant growth in sales and new customers in 2006.  Revenue in 2006 grew by 70% over 2005, and Accelicon expanded the customer base to over 40 worldwide.  Foundries and IDMs worldwide are rapidly adopting MBP, Accelicon's flagship model generation product.  Accelicon's MQA, the market's leading model validation solution, is actively used in foundries, IDMs and fab-less semiconductor design houses worldwide.  "Significant enhancements in MBP and MQA," says CEO Tim K Smith, "coupled with Accelicon's expert support, has enabled Accelicon to become a leading provider of device modeling and validation solutions."

January 29, 2007
Accelicon Technologies Announces the latest release of MBP, Version 2006.4.0

Significant customer input is incorporated into this new MBP release, addressing the requirements aof today's deep-submicron model generation teams. MBP's task tree is more efficient in the new release, and the customiztion interface is much easier for the user to edit. Also, this new version utilizes a superior optimization routine in the extraction methodology.  Feature for feature, Accelicon Technologies provides the leading solution for device model generation.

March 28, 2006
Accelicon Plans Exhibit at 43rd Design Automation Conference in San Francisco, California

Accelicon Technologies will be exhibiting at the 43rd DAC in San Francisco, California, from July 24-28, 2006. Accelicon will be demonstrating Model Quality Assurance (MQA) and Model Builder Program (MBP) at demo suite #623. Call Xiaolan Wu at (650) 380-3962 to schedule a demo of Accelicons products.

January 31, 2006
Another Year of Rapid Growth for Accelicon

Cupertino, CA - Accelicon Technologies announces another year of significant revenue growth in 2005. Sales revenues more than doubled between 2004 and 2005 and new customer logos increased bringing the total to more than 30 companies worldwide. "Accelicon Technologies' MQA and MBP are quickly becoming the leading solutions for SPICE model validation and generation. We have more than 30 customers worldwide are using our products actively, including major foundries and IDMs in US, Japan and Europe." says Accelicon Technologies' CEO Tim K Smith. "This is contributing to our robust growth in the marketplace. In the mean time we are working with strategic partners to enhance our product. We are confident that 2006 will be a year of rapid growth as well."